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UNIT-V
- (a) Explain about SM Chart?
(b) Implement the DICE GAME using Verilog ?
- Explain about following statement with example
- The case statement
- Wait construct
- For Loop
- Event
UNIT-VI
- Write a brief note on Tri-State gate?
- (a) Describe procedural continuous assignment statements Assign, De-assign, force, force & release.
(b) Explain the compiler directives in details.
- Write about complex programmable logic devices(CPLD) in detail with neat sketch.
- Parallel blocks
- Memory blocks
- (a) Explain the Pin-to-Pin Delay with example.
(b) Explain and specify blocks of Path delay Modeling.
UNIT-VII
- Write a brief note on Bi-directional gates.
- Explain about following statement
- $stop and $finish task
- $random function
- $monitor task
- (a) Discuss about the sequential models used in the digital design.
(b) Write about basic Switch Primitives.
- (a) Write a brief notes on Sequential Models.
(b) Discuss about the combinational circuit testing.
UNIT-VIII
- (a) Explain about the following terms with respect to Verilog
- Module path delay
- Hierarchical access
(b) Explain about different system tasks and functions available in Verilog with example.
- (a) Write a note on User Defined Sequential Primitives(UDP).
(b) Explain about Set up time and Hold time.
- Explain about following statements
(a) $monitor and $display
(b) Simulation time
