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Advanced Computer Architecture (ACA) pdf Lecture notes – B.tech Notes 2020
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Lecture Notes & Advanced Computer Architecture (ACA) pdf Lecture notes
Unit 1
Unit 2
Unit 3
Unit 4
Unit 5
Advanced Computer Architecture notes
Unit-1:
it is necessary to consider binary point. If binary point is assumed to the right of the sign bit, ARITHMETIC OPERATIONS,ALU,FIXED POINT NUMBER AND OPERATION, FLOATING POINT NUMBERS & OPERATIONS.Carry Look Ahead Adder, Typical Schematic Symbol of an ALU, ADDITION AND SUBTRACTION,Full Adder, Binary Adder,
Unit-2:
Binary multiplier. Need for using arithmetic circuits in designing combinational circuits, Half Adder, Full Adder, Binary adder, Subtraction, Binary subtractor, DIVISION. Multiplication, Binary multiplier, Multiplication Basics, Speedup techniques, Booth Re-coding, Restoring Division Algorithm, Non-Restoring Division Algorithm. To represent the fractional binary numbers, iwe can represent the fractional binary numbers as given below.
Unit-3:
PROCESSOR AND CONTROL UNIT, Basic MIPS implementation, BUILDING A DATA-PATH, CONTROL IMPLEMENTATION SCHEME, PIPE LINED DATA-PATH AND CONTROL. HANDLING DATA HAZARDS & CONTROL HAZARDS, EXCEPTIONS, A basic MIPS implementation, An overview of the implementation, the ALU control, designing the main control unit, finalizing control. Designing instruction sets for pipe-lining, fetch instruction from memory, BUILDING A DATA-PATH, AN OVERVIEW OF PIPE-LINING, designing instruction sets for pipe-lining.
Unit-4:
Parallelism, characters of parallelism, microscopic vs macroscopic, symmetric vs asymmetric, rain grain vs coarse grain, explict vs implict, introduction of level parallelism, ex-plotting the parallelism in pipeline, concept of speculation, static multiple issue, static multiple issue with MIPS ISA, Dynamic multiple issue, parallel processing issue, types of dependencies, name dependence, output dependence, anti dependence, data tree dependence, control dependence, control dependence, resource dependence, anti dependence, instruction dependency graph, data dependency, SIMD architecture, MIMD architecture, message passing MIMD architecture, multi-core processor.
Unit-5:
MEMORY AND I/O SYSTEMS, MEMORY HIERARCHY, Primary memory, secondary memory, memory hierarchy, MEMORY TECHNOLOGIES. Random-Access Memory , Static RAM , Conventional DRAMs, Enhanced DRAMs, Accessing Main Memory , Disk Storage, CACHE BASICS – MEASURING AND IMPROVING CACHE PERFORMANCE. Calculating Cache Performance, Reducing Cache Misses by Move Flexibfle Placement of Blocks, Choosing Which Block to Replace, VIRTUAL MEMORY, TLBS – INPUT/OUTPUT SYSTEM, Input/Output, Peripherals and the System Bus.
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